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address select switches. When held low (normal) they allow normal address selection to your preferred address. When high all address bits will be high, ie. F000H for CP/M.

Fig. 3 shows the schematic diagram (you can work out the physical layout yourselves) for the Auto Reset on switch over. The circuit provides a low pulse to the Reset line whenever the state of the control line changes. The length of the pulse has been made quite long to ensure that the normal Reset timing capacitor is fully discharged. If reset of your ports is not required then the reset can go direct to the CPU, Bus pin 14 which is much faster and therefore safer. (Funny arrangement that – the PIO’s are not reset by the CPU reset line on power up, only when you press the reset switch!!).

Figs. 4, 5 & 6 show the various things that can be done with the BASIC ROM and Workspace RAM sockets to use up the spare locations. (I put my Workspace RAM in the BASIC socket and the CP/M ROM in the X ROM socket mainly for ease of changing the CP/M ROM later – it’s more accessible (in my system) and it does not require mods to the socket or wiring direct to the ROM’s pins.