80-Bus News

I decided to modify my system to take 4K EPROMs, and having read the two articles in INMC80-5 I chose the RAM board as an easier mod. than the main board. In practice, it turned out to be rather more complicated by the time I had it working.

The published scheme covered 2K and 4K chips, but the 4K version will not work. The problem with taking the 4K decodes direct to the chip slects (p20) instead of using them to enable IC24, is that P5 also drives the data highway buffer, IC26. There are two ways around this: P5 can be driven with 4 wire ORed 4K decodes and IC24 fed with A13 and A12 and used to drive the chip slect lines, i.e. the 2K scheme but bigger. Alternatively the decodes can be taken direct to the chip select lines, and diode ORed to P5. The advantage of this approach is that it gives freedom to choose any set of addresses, whereas the other method constrains the 4 blocks used to have different values of A12/​A13, e.g. to be 4 contiguous blocks. With 32K of RAM and a toolkit in 2 x 1K EPROMs at B000 I could not accept this constraint.

The problem then was where to lose 4 diodes, neatly. After some thought, I mounted them on a minimally sized piece of 0.1″ Verostrip which just fitted between IC24 and the decode pads. I araldited this copper side up onto the board which could just be done without covering any tracks. To allow room for the tails of the diode leads, I used an extra thickness of Veroboard as a spacer. The rest of the modification is as the original one except that I cut the tracks to IC27 pins 19 and 21 on the non component side. This allowed the links to be added also on that side using the through hole thus made available.